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Turkish Journal of Physics

DOI

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Abstract

A memory capacitor formed from Al/Si_3N_4/Si was prepared by means of trapping and de trapping mechanism of the dielectric films. Charge trapping and interface state characteristics of silicon nitride (Si_3N_4) films deposited by standard plasma enhanced chemical vapor deposition technique were investigated. High frequency capacitance-voltage (C-V), conductance-voltage (G-V) and current voltage (I-V) measurements were carried out at various temperatures on metal-oxide-semiconductor capacitors, for as-deposited samples, post metallization annealed (PMA) at 400 °C and 600 °C samples. The electrically measured characteristics indicate the shift in flat band voltage V_FB in silicon nitride (Si_3N_4) was initially much higher in the as-deposited samples. This is attributed to its high density of interface traps and higher capability to store the charges in the deep traps for the application of non volatile memory devices. An enlarged memory window in CV characteristics was observed in memory operations, due to the higher density of traps in silicon--nitride films. Following post-metallization annealing there is significant shift in flat band voltage due to moderation of trapping and de-trapping sites at the interface of thin films; and with this, a new method of post metallization annealing (PMA) is proposed to moderate the charge storage capability of metal insulator semiconductor (MIS) memory cell. This behavior of as-deposited Al/Si_3N_4/Si MIS structure, and of low temperature post metallization annealed samples, suggests the behavior is due to the holes trapping and de-trapping mechanism at the Al/Si_3N_4/Si interface, not due to ionic charge displacement. The larger memory window indicated by the width of hysteresis and longer retention time in the memory operations are discussed in terms of trap-assisted charging / discharging mechanisms.

Keywords

PECVD, Nitride films, C-V, G-V, I-V, P M A, hysteresis and memory window

First Page

217

Last Page

226

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