A New Unified Array Architecture for Discrete Cosine and Sine Transforms
A new design approach to derive a unified systolic array for prime-length discrete cosine and sine transforms (DCT/DST) is proposed. This approach is based on a new unified systolic algorithm for DCT/DST that uses a circular correlation structure with the same structure and length for both transforms. The proposed unified algorithm is then mapped into a linear array with a small number of I/O channels and low I/O bandwidth. A highly efficient unified VLSI chip can be thus obtained, with only a small percentage of the chip area being idle in a particular transform. It outperforms others in the acrhitectural topology, computing parallelism, processing speed, hardware complexity and I/O costs.
CHIPER, Doru-Florin (1997) "A New Unified Array Architecture for Discrete Cosine and Sine Transforms," Turkish Journal of Electrical Engineering and Computer Sciences: Vol. 5: No. 1, Article 13. Available at: https://journals.tubitak.gov.tr/elektrik/vol5/iss1/13