Turkish Journal of Electrical Engineering and Computer Sciences




With the scaling of transistor feature size and increased integration density, power density has increased, resulting in high chip temperature, thus degrading the performance and lifetime of the chip. In this work, an ultralow power smart temperature sensor employing a frequency locked loop technique is developed in 65 nm standard CMOS process. The circuit works on the principle of voltage to frequency conversion, exploiting the thermal dependency of threshold voltage (V$_{th})$ of MOS transistors in the subthreshold region. The sensor along with signal conditioning subcircuits has a low power consumption of 1.92 $\mu $W, while operating over -55 $^{\circ}$C to +125 $^{\circ}$C with a conversion rate of 10K samples/s. The output frequency corresponding to temperature has its temperature coefficient insensitive to process variation and therefore requires one-point calibration. Due to the simple signal conditioning circuitry, the sensor consumes an estimated area of 0.003 mm$^{2}$. Since the sensor has all its subcircuits working in the subthreshold region, it is suitable for low power applications.


Smart temperature sensor, dynamic thermal management, frequency locked loop, calibration, switched capacitor, voltage controlled oscillator

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