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Turkish Journal of Electrical Engineering and Computer Sciences

DOI

10.3906/elk-1411-187

Abstract

In this study a first-order asynchronous current-mode sigma-delta modulator has been designed and simulated. Asynchronous sigma-delta modulators eliminate the continuous time sigma-delta modulator's problem of signal-to-noise ratio degradation due to clock jitter by avoiding the use of sampling in the modulator loop. Moreover, they provide a higher signal-to-noise ratio even with low-order filters. Thus, considerably low power consumption can be achieved with fewer circuit components. The current mode enables designers to scale the circuits according to different supply voltages and operating currents. In this work, design steps for an asynchronous sigma-delta modulator have been given taking into account its ideal mathematical model. Novel current comparator architecture is proposed, which is used as a one bit-quantizer. Its working principles are explained. The comparator's operation is verified by the simulations in the asynchronous sigma-delta loop. Simulation results show that a satisfactory performance can be obtained with relatively simple designs, compared to ordinary synchronous continuous time sigma-delta modulators.

Keywords

Analogue to digital converters, asynchronous sigma-delta modulator, sigma-delta modulator, current mode sigma-delta modulator

First Page

4569

Last Page

4581

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