Turkish Journal of Electrical Engineering and Computer Sciences
Abstract
Memory accesses take a large part of the power consumption in the iterative decoding of double-binary convolutional turbo code (DB-CTC). To deal with this, a low-memory intensive decoding architecture is proposed for DB-CTC in this paper. The new scheme is based on an improved maximum a posteriori probability algorithm, where instead of storing all of the state metrics, only a part of these state metrics is stored in the state metrics cache (SMC), and the memory size of the SMC is thus reduced by 25%. Owing to a compare-select--recalculate processing (CSRP) module in the proposed decoding architecture, the unstored state metrics are recalculated by simple operations, while maintaining near optimal decoding performance.
DOI
10.3906/elk-1203-86
Keywords
Branch metrics, computational complexity, MAP algorithm, state metrics cache
First Page
202
Last Page
213
Recommended Citation
ZHAN, M, ZHOU, L, & WU, J (2014). A low-memory intensive decoding architecture for double-binary convolutional turbo code. Turkish Journal of Electrical Engineering and Computer Sciences 22 (1): 202-213. https://doi.org/10.3906/elk-1203-86
Included in
Computer Engineering Commons, Computer Sciences Commons, Electrical and Computer Engineering Commons
