VLSI-cell placement technique for Architecture of Field Programmable Gate Array (FPGA) design

Authors

AVNESH VERMA
SUNIL DHINGRA
M. K. SONI

DOI

10.3906/elk-0908-173

Abstract

The Field Programmable Gate Array (FPGA) is an on field programmable device which can be designed for different applications. Various types of software are available for its synthesis. The cell placement depends upon the designing and programming languages used for FPGA. In this paper cell placement technique of FPGA architecture is analyzed for the application of Space Vector Pulse Width Modulation (SVPWM) technique used in speed control of an induction motor. The modulation pulses are produced due to the various components activated and their interconnection in Configurable Logic Blocks (CLBs). Few of its components are so analyzed to find out the reason for their desired output response. This survey has also been conducted to find the correlation of LUTs and formulation of output.

Keywords

Field Programmable Gate Array (FPGA), Space Vector Pulse Width Modulation (SVPWM), Configurable Logic Blocks (CLBs), Look Up Table (LUT), Routing, Insulated Gate Bipolar Transistor (IGBT).

First Page

327

Last Page

336

Recommended Citation

VERMA, AVNESH; DHINGRA, SUNIL; and SONI, M. K. (2009) "VLSI-cell placement technique for Architecture of Field Programmable Gate Array (FPGA) design," Turkish Journal of Electrical Engineering and Computer Sciences: Vol. 17: No. 3, Article 12. https://doi.org/10.3906/elk-0908-173
Available at: https://journals.tubitak.gov.tr/elektrik/vol17/iss3/12