Along with advances in microelectronics, and computer and space technologies, device dimensions are becoming smaller; as a result, hot-carrier effect, lifetime prediction, and reliability become more important concepts for MOS transistors. In this paper, the degradation in the drain current and threshold voltage of P-MOS transistors are observed by operating the devices under voltage stress conditions. Using the observation results, the effect of hot-carriers was investigated statistically and a new statistical method for modeling was proposed as an alternative to those given in the literature. The linear regression method is used to estimate the power, Weibull, and logarithmic parameters, and the correlation coefficient is used to confirm the results. The observed and estimated values of the degradation are compared. SPICE simulation of a CMOS inverter was performed to demonstrate how the proposed method can be applied to a circuit example.
KAÇAR, FIRAT; KUNTMAN, AYTEN; and KUNTMAN, HAKAN (2006) "Statistical Model of Hot-Carrier Degradation and Lifetime Prediction for P-MOS Transistors," Turkish Journal of Electrical Engineering and Computer Sciences: Vol. 14: No. 3, Article 4. Available at: https://journals.tubitak.gov.tr/elektrik/vol14/iss3/4