Authors: ÖNDER POLAT, SEMA KAYHAN
Abstract: Compressed sensing is widely used to compress electrocardiogram (ECG) signals, but the major challenges of the compressed sensing algorithms are their highly complex signal reconstruction processes. In this paper, a reconfigurable high-speed and low-power field-programmable gate array (FPGA) implementation of the least support denoising-orthogonal matching pursuit (LSD-OMP) algorithm for the real-time reconstruction of the ECG signals is presented. The contribution of this study is two-fold: Firstly, LSD-OMP can pick more than one element at each iteration and reconstruct the sparse signal using less number of iterations as compared to the standard OMP algorithms. Latency of the proposed design is therefore reduced by exploiting the multiple index selection feature of LSD-OMP. Secondly, the proposed architecture is the first reconfigurable LSD-OMP reconstruction architecture which can take different signal sizes and different sparsity levels. The proposed design also includes an efficient inverse wavelet transform (IWT) module to convert the reconstructed signal back into the time-domain. Together with the overhead of the IWT module, the proposed design demonstrates faster execution times while consuming lower power than the existing FPGA implementations; therefore, it can be utilized in wireless body area networks as a back-end unit to reconstruct the compressed ECG signals.
Keywords: Field-programmable gate array, electrocardiogram, real-time, compressed sensing
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